1–48
Table 1–14. Transceiver Functional Modes for Protocol Implementation (Part 2 of 2)
Functional Mode
Protocol
Deterministic
Proprietary, CPRI,
Latency
SDI
Basic Mode
The Cyclone IV GX transceiver channel datapath is highly flexible in Basic mode to
implement proprietary protocols. SATA, V-by-One, and Display Port protocol
implementations in Cyclone IV GX transceiver are supported with Basic mode.
Figure 1–44
Figure 1–44. Transceiver Channel Datapath in Basic Mode
FPGA
Fabric
Cyclone IV Device Handbook,
Volume 2
TX PLL phase frequency detector (PFD) feedback,
OBSAI
registered mode FIFO, TX bit-slip control
SDI
High-speed SERDES, CDR
shows the transceiver channel datapath supported in Basic mode.
Tx Phase
Comp
FIFO
wr_clk
rd_clk
Rx
Byte
Byte
Phase
Order-
De-
Comp
serializer
ing
FIFO
Chapter 1: Cyclone IV Transceivers Architecture
Key Feature
Transmitter Channel PCS
8B/10B Encoder
Byte Serializer
wr_clk
rd_clk
Receiver Channel PCS
Rate
8B/10B
Deskew
Match
Decoder
FIFO
FIFO
Transceiver Functional Modes
Reference
"Deterministic Latency
Mode" on page 1–73
"SDI Mode" on
page 1–76
Transmitter Channel PMA
Serializer
Receiver Channel PMA
Word
Deserial-
CDR
Aligner
izer
February 2015 Altera Corporation
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