Can Message Data Registers N0 To N7 (M_Datan0 To M_Datan7) - NEC Renesas V850/SC1 User Manual

32-bit single-chip microcontrollers
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19.5.4

CAN message data registers n0 to n7 (M_DATAn0 to M_DATAn7)

The M_DATAn0 to M_DATAn7 registers are areas where up to 8 bytes of transmit or receive message data is
stored.
These registers can be read/written in 8-bit units.
The M_DATAn0 to M_DATAn7 registers are used to hold receive message data and transmit message data.
When data is transmitted, the number of messages defined by the DLC3 to DLC0 bits in the M_DLCn register are
transmitted via the CAN bus.
When the M_CTRLn register's ATS bit has been set (1) and the value of the DLC3 to DLC0 bits in the M_DLCn
register is at least two bytes, the last two bytes that are sent normally via the CAN bus are ignored and the time
stamp value is sent.
When a new message is received, all data fields are updated, even when the value of the DLC3 to DLC0 bits in
the M_DLCn register is less than 8 bytes. The values of data bytes that have not been received on the CAN bus may
be updated, but they are ignored.
Remark
n = 00 to 31, x = 0 to 7
7
M_DATAn0
D07
D06
(n = 00 to 31)
7
M_DATAn1
D17
D16
(n = 00 to 31)
7
M_DATAn2
D27
D26
(n = 00 to 31)
7
M_DATAn3
D37
D36
(n = 00 to 31)
7
M_DATAn4
D47
D46
(n = 00 to 31)
7
M_DATAn5
D57
D56
(n = 00 to 31)
7
M_DATAn6
D67
D66
(n = 00 to 31)
7
M_DATAn7
D77
D76
(n = 00 to 31)
CHAPTER 19
FCAN CONTROLLER (V850/SC3)
6
5
4
D05
D04
6
5
4
D15
D14
6
5
4
D25
D24
6
5
4
D35
D34
6
5
4
D45
D44
6
5
4
D55
D54
6
5
4
D65
D64
6
5
4
D75
D74
User's Manual U15109EJ3V0UD
3
2
1
D03
D02
D01
3
2
1
D13
D12
D11
3
2
1
D23
D22
D21
3
2
1
D33
D32
D31
3
2
1
D43
D42
D41
3
2
1
D53
D52
D51
3
2
1
D63
D62
D61
3
2
1
D73
D72
D71
0
Address
After reset
D00
See Table 19-6 Undefined
0
Address
After reset
D10
See Table 19-6 Undefined
0
Address
After reset
D20
See Table 19-6 Undefined
0
Address
After reset
D30
See Table 19-6 Undefined
0
Address
After reset
D40
See Table 19-6 Undefined
0
Address
After reset
D50
See Table 19-6 Undefined
0
Address
After reset
D60
See Table 19-6 Undefined
0
Address
After reset
D70
See Table 19-6 Undefined
581

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