68Hcll - HP 1652B Getting Started Manual

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CPU Package: 4%pin dual-in-line

Accessories Required: HP 10315G

Maximum Clock Speed: 8.4 MHz input

Signal Line Loading: 1OOKQ plus 12 pF on all lines.

Microprocessor Cycles Identified:

Data read/write

Opcode/operand fetches

Index offsets

Branch offsets

Additional Capabilities:

Irrelevant cycles

The 68HCll must be operating in the

expanded multiplexed mode (addressing

external memory and/or peripheral devices)

for the logic analyzer to provide inverse

HP 16528/1653B

Front-Panel Reference

Maximum Power Required: None

Logic Analyzer Required: HP 1652B or HP1553B

Number of Probes Used:Two 16.channel probes for state analysis and

one to four for timing analysis.

Microprocessor Specific Measurements

Chapters

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