HP 1652B Getting Started Manual page 270

Logic
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Specifying
the
If you remember from "What's a State Analyzer" in Feeling Comfortable
J Clock
with Logic An-m,
the state analpr samples the data under the
control of an external clock, which is "synchronous" with your circuit
under test. Therefore, you must specify which clock probe you will use
for your measurement. In this exercise, you will use the J clock, which is
accessible through pod 1.
1. Select the State Format Specification menu by pressing the
FORMAT key.
2. Set the J Clock to sample on a negative-going edge.
HP 1652B/l653B
State Analyzer Measurement Example
Front-Panel Reference
15-B
speclf Its tlon
Spectf
y Spbol
s
Clock
Clock
Pariocl
Pod
2
Pod
1
tY '
Pal
+
El +
---a--
J&
--------------
15 . . . .
' J
,...a.
+lK~dIldXlN[Il
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-
++***o*-~+oL*C4
Lt
7
Figure 15-4. Specifying the J Clock
a. Place the cursor on the CLOCK field and press SELECT.
b. Place the cursor on the box just to the right of J in the pop-up
(labeled OFF) and press SELECT.
c. Place the cursor on 4 and press SELECT.
d. Place the cursor on Done and press SELECT.

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