HP 1652B Getting Started Manual page 200

Logic
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Although labels can contain split fields, assigned channels are always
numbered consecutively within a label. The numbering of channels is
illustrated with the figure below.
piimcq-
Ststo
For#t
Specification
Clock
J&
Clock
Period
[>60]
clcttv1
tg
> ------------a---
----------------
----------------
Label
PoI
IS....
87
o...
0
15....
87
.a..
0
15 .,,,
87
a,,,
0
Bii 31
Bk 19
Bit 8 Bit 0
Figure 94. Numbering of Assigning Bits
Pod Threshold
Each pod has a threshold level assigned to it. For the HP 1653B Logic
Analyzer, threshold levels may be defined for Pods 1 and 2 individually.
For the HP 1652B Logic Analyzer, threshold levels may be defined for
Pods 1,2 and 3 individually, and one threshold for Pods 4 and 5. It does
not matter if Pods 4 and 5 are assigned to different analyzers. Changing
the threshold of one will change the threshold of the other.
If you place the cursor on one of the pod threshold fields and press
SELECT, you will see the following pop-up menu.
)r
TTL
.
ECL
.
User-defined c
Figure 9-5. Pod Threshold Pop-Up Menu
TIL
sets the
threshold at + 1.6 volts, and ECL sets the threshold at
- 1.3 volts.
State Format Specification Menu
Q-6
HP 16528/1653B
Front-Panel Reference

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