Fig. 2.9 Port - Fujitsu F2MC-8L Family series Hardware Manual

HARDWARE CONFIGURATION
Internal-data bus
Only for P32 and P33
PSEL of LCDR
V1/ V2
PDR
Stop
PDR read Pin
PDR read
(when Read Modify Write instruction
executed)
Output latch
N-ch
PDR write
Stop, SPL = 1

Fig. 2.9 Port 3

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