Register Descriptions - Renesas F-ZTAT H8 Series Hardware Manual

9.7.2

Register Descriptions

Table 9.10 summarizes the registers of port 6.
Table 9.10 Port 6 Registers
Address* Name
H'FFC9 Port 6 data direction
register
H'FFCB Port 6 data register
Note: * Lower 16 bits of the address.
Port 6 Data Direction Register (P6DDR)
P6DDR is an 8-bit write-only register that can select input or output for each pin in port 6. Bit 7 is
reserved. It cannot be modified and is always read as 1.
Bit 7
—
Initial value 1
Read/Write —
Reserved bit
Modes 1 to 6 (Expanded Modes): Ports P6
HWR, RD, AS), regardless of the settings of P6
bus control pins (BACK, BREQ, WAIT) or I/O ports. For selecting the pin function, see table
9.11. When ports P6
2
of port 6 functions as an output port. If P6DDR is cleared to 0, the corresponding pin functions as
an input port.
Mode 7 (Single-Chip Mode): Port 6 is a generic input/output port. A pin in port 6 becomes an
output port if the corresponding P6DDR bit is set to 1, and an input port if this bit is cleared to 0.
P6DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P6DDR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. If a P6DDR bit is set to 1 while port 6 acts as an I/O port, the
corresponding pin maintains its output state in software standby mode.
Abbreviation
P6DDR
P6DR
6 5
P6 DDR P6 DDR
6 5
0 0
W W
to P6 function as I/O ports and if P6DDR is set to 1, the corresponding pin
0
R/W
W
R/W
4 3
P6 DDR P6 DDR
4 3
0 0
W W
Port 6 data direction 6 to 0
These bits select input or output for port 6 pins
to P6 function as bus control output pins (LWR,
6 3
DDR to P6 DDR. Ports P6
6 3
Rev. 7.00 Sep 21, 2005 page 279 of 878
Section 9 I/O Ports
Initial Value
Mode 1 to 5 Mode 6, 7
H'F8 H'80
H'80 H'80
2 1
P6 DDR P6 DDR P6 DDR
2 1
0 0
W W
to P6 function as the
2 0
REJ09B0259-0700
0
0
0
W