Input/Output Pins; Register Configuration - Renesas F-ZTAT H8 Series Hardware Manual

Section 13 Serial Communication Interface
13.1.3

Input/Output Pins

The SCI has serial pins for each channel as listed in table 13.1.
Table 13.1 SCI Pins
Channel Name
0 Serial clock pin
Receive data pin
Transmit data pin
1 Serial clock pin
Receive data pin
Transmit data pin
13.1.4

Register Configuration

The SCI has internal registers as listed in table 13.2. These registers select asynchronous or
synchronous mode, specify the data format and bit rate, and control the transmitter and receiver
sections.
Table 13.2 Registers
Address *
Channel
0 H'FFB0
H'FFB1
H'FFB2
H'FFB3
H'FFB4
H'FFB5
1 H'FFB8
H'FFB9
H'FFBA
H'FFBB
H'FFBC
H'FFBD
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written, to clear flags.
Rev. 7.00 Sep 21, 2005 page 454 of 878
REJ09B0259-0700
Abbreviation
SCK
0
RxD
0
TxD
0
SCK
1
RxD
1
TxD
1
1
Name
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
I/O Function
Input/output SCI
0
Input SCI
0
Output SCI
0
Input/output SCI
1
Input SCI
1
Output SCI
1
Abbreviation R/W
SMR R/W
BRR R/W
SCR R/W
TDR R/W
R/(W) *
SSR
RDR R
SMR R/W
BRR R/W
SCR R/W
TDR R/W
R/(W) *
SSR
RDR R
clock input/output
receive data input
transmit data output
clock input/output
receive data input
transmit data output
Initial Value
H'00
H'FF
H'00
H'FF
2
H'84
H'00
H'00
H'FF
H'00
H'FF
2
H'84
H'00