Register Descriptions - Renesas F-ZTAT H8 Series Hardware Manual

9.6.2

Register Descriptions

Table 9.8 summarizes the registers of port 5.
Table 9.8 Port 5 Registers
Address* Name
H'FFC8 Port 5 data direction
register
H'FFCA Port 5 data register
H'FFDB Port 5 input pull-up MOS
control register
Note: * Lower 16 bits of the address.
Port 5 Data Direction Register (P5DDR)
P5DDR is an 8-bit write-only register that can select input or output for each pin in port 5.
Bits 7 to 4 are reserved. They cannot be modified and are always read as 1.
Bit
Initial value
Modes
1 to 4
Read/Write
Initial value
Modes
5 to 7
Read/Write
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P5DDR values are fixed at 1
and cannot be modified. Port 5 functions as an address bus.
Modes 5 and 6 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 5 is
an input port. A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set
to 1, and an input port if this bit is cleared to 0.
Abbreviation
P5DDR
P5DR
P5PCR
7 6 5
— — —
1 1 1
— — —
1 1 1
— — —
Reserved bits
R/W Modes 1 to 4
W H'FF
R/W H'F0
R/W H'F0
4 3 2
— P5 DDR P5 DDR
3 2
1 1 1
— — —
1 0 0
— W W
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Rev. 7.00 Sep 21, 2005 page 275 of 878
Section 9 I/O Ports
Initial Value
Modes 5 to 7
H'F0
H'F0
H'F0
1 0
P5 DDR P5 DDR
1 0
1 1
— —
0 0
W W
REJ09B0259-0700