Dmac States In Reset State, Standby Modes, And Sleep Mode - Renesas F-ZTAT H8 Series Hardware Manual

Section 8 DMA Controller
8.4.14

DMAC States in Reset State, Standby Modes, and Sleep Mode

When the chip is reset or enters hardware or software standby mode, the DMAC is initialized and
halts. DMAC operations continue in sleep mode. Figure 8.24 shows the timing of a cycle-steal
transfer in sleep mode.
CPU cycle
T
2
φ
Address bus
RD
HWR LWR
,
Figure 8.24 Timing of Cycle-Steal Transfer in Sleep Mode
Rev. 7.00 Sep 21, 2005 page 250 of 878
REJ09B0259-0700
DMAC cycle
T T T T T
d 1 2 1 2
Sleep mode
DMAC cycle
T T T T
d 1 2 1
T T
2 d