Section 10 16-Bit Integrated Timer Unit (Itu); Overview; Features - Renesas F-ZTAT H8 Series Hardware Manual

Section 10 16-Bit Integrated Timer Unit (ITU)

10.1

Overview

The H8/3048 Group has a built-in 16-bit integrated timer unit (ITU) with five 16-bit timer
channels.
When the ITU is not used, it can be independently halted to conserve power. For details see
section 21.6, Module Standby Function.
10.1.1

Features

ITU features are listed below.
• Capability to process up to 12 pulse outputs or 10 pulse inputs
• Ten general registers (GRs, two per channel) with independently-assignable output compare or
input capture functions
• Selection of eight counter clock sources for each channel:
Internal clocks: φ, φ/2, φ/4, φ/8
External clocks: TCLKA, TCLKB, TCLKC, TCLKD
• Five operating modes selectable in all channels:
 Waveform output by compare match
Selection of 0 output, 1 output, or toggle output (only 0 or 1 output in channel 2)
 Input capture function
Rising edge, falling edge, or both edges (selectable)
 Counter clearing function
Counters can be cleared by compare match or input capture
 Synchronization
Two or more timer counters (TCNTs) can be preset simultaneously, or cleared
simultaneously by compare match or input capture. Counter synchronization enables
synchronous register input and output.
 PWM mode
PWM output can be provided with an arbitrary duty cycle. With synchronization, up to
five-phase PWM output is possible
• Phase counting mode selectable in channel 2
Two-phase encoder output can be counted automatically.
Section 10 16-Bit Integrated Timer Unit (ITU)
Rev. 7.00 Sep 21, 2005 page 315 of 878
REJ09B0259-0700