Operation; Overview - Renesas F-ZTAT H8 Series Hardware Manual

11.3

Operation

11.3.1

Overview

When corresponding bits in PADDR or PBDDR and NDERA or NDERB are set to 1, TPC output
is enabled. The TPC output initially consists of the corresponding PADR or PBDR contents.
When a compare-match event selected in TPCR occurs, the corresponding NDRA or NDRB bit
contents are transferred to PADR or PBDR to update the output values.
Figure 11.2 illustrates the TPC output operation. Table 11.3 summarizes the TPC operating
conditions.
DDR
TPC output pin
Table 11.3 TPC Operating Conditions
NDER DDR
0 0
1
1 0
1
NDER
Q Q
C
Q DR
Figure 11.2 TPC Output Operation
Pin Function
Generic input port
Generic output port
Generic input port (but the DR bit is a read-only bit, and when compare
match occurs, the NDR bit value is transferred to the DR bit)
TPC pulse output
Section 11 Programmable Timing Pattern Controller
Output trigger signal
D
Rev. 7.00 Sep 21, 2005 page 427 of 878
Q NDR D
REJ09B0259-0700
Internal
data bus