Register Descriptions - Renesas F-ZTAT H8 Series Hardware Manual

Section 9 I/O Ports
9.10.2

Register Descriptions

Table 9.16 summarizes the registers of port 9.
Table 9.16 Port 9 Registers
Address* Name
H'FFD0 Port 9 data direction register
H'FFD2 Port 9 data register
Note: * Lower 16 bits of the address.
Port 9 Data Direction Register (P9DDR)
P9DDR is an 8-bit write-only register that can select input or output for each pin in port 9.
Bits 7 and 6 are reserved. They cannot be modified and are always read as 1.
Bit 7
PA
Initial value 0
Read/Write R/W
While port 9 acts as an I/O port, a pin in port 9 becomes an output port if the corresponding
P9DDR bit is set to 1, and an input port if this bit is cleared to 0. For selecting the pin function, see
table 9.17.
P9DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P9DDR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. If a P9DDR bit is set to 1 while port 9 acts as an I/O port, the
corresponding pin maintains its output state in software standby mode.
Rev. 7.00 Sep 21, 2005 page 290 of 878
REJ09B0259-0700
6 5
PA PA
7 6 5
0 0
R/W R/W
Abbreviation
P9DDR
P9DR
4 3
PA PA
4 3
0 0
R/W R/W
Port A data 7 to 0
These bits store data for port A pins
R/W Initial Value
W H'C0
R/W H'C0
2 1
PA PA PA
2 1
0 0
R/W R/W R/W
0
0
0