Port 2; Overview - Renesas F-ZTAT H8 Series Hardware Manual

Section 9 I/O Ports
9.3

Port 2

9.3.1

Overview

Port 2 is an 8-bit input/output port with the pin configuration shown in figure 9.2. The pin
functions differ according to the operating mode.
In modes 1 to 4 (expanded modes with on-chip ROM disabled), port 2 consists of address bus
output pins (A to A
15 8
in the port 2 data direction register (P2DDR) can designate pins for address bus output (A
or generic input. In mode 7 (single-chip mode), port 2 is a generic input/output port.
When DRAM is connected to area 3, A
write cycles. For details see section 7, Refresh Controller.
Port 2 has software-programmable built-in pull-up MOS. Pins in port 2 can drive one TTL load
and a 90-pF capacitive load. They can also drive a darlington transistor pair.
Port 2 pins
Port 2
Rev. 7.00 Sep 21, 2005 page 264 of 878
REJ09B0259-0700
). In modes 5 and 6 (expanded modes with on-chip ROM enabled), settings
and A
9
Modes 1 to 4
P2 /A A (output)
7 15 15
P2 /A A (output)
6 14 14
P2 /A A (output)
5 13 13
P2 /A A (output)
4 12 12
P2 /A A (output)
3 11 11
P2 /A A (output)
2 10 10
P2 /A A (output)
1 9 9
P2 /A A (output)
0 8 8
Figure 9.2 Port 2 Pin Configuration
output row and column addresses in read and
8
Modes 5 and 6
P2 (input)/A
7 15
P2 (input)/A
6 14
P2 (input)/A
5 13
P2 (input)/A
4 12
P2 (input)/A
3 11
P2 (input)/A
2 10
P2 (input)/A
1 9
P2 (input)/A
0 8
15
Mode 7
(output) P2 (input/output)
7
(output) P2 (input/output)
6
(output) P2 (input/output)
5
(output) P2 (input/output)
4
(output) P2 (input/output)
3
(output) P2 (input/output)
2
(output) P2 (input/output)
1
(output) P2 (input/output)
0
to A )
8