Flash Memory Overview; Flash Memory Operation - Renesas F-ZTAT H8 Series Hardware Manual

Section 19 Flash Memory (H8/3048F: Dual Power Supply (V
19.2

Flash Memory Overview

19.2.1

Flash Memory Operation

Table 19.2 illustrates the principle of operation of the on-chip flash memory of the H8/3048F
(dual-power supply).
Like EPROM, flash memory is programmed by applying a high gate-to-drain voltage that draws
hot electrons generated in the vicinity of the drain into a floating gate. The threshold voltage of a
programmed memory cell is therefore higher than that of an erased cell. Cells are erased by
grounding the gate and applying a high voltage to the source, causing the electrons stored in the
floating gate to tunnel out. After erasure, the threshold voltage drops. A memory cell is read like
an EPROM cell, by driving the gate to the high level and detecting the drain current, which
depends on the threshold voltage. Erasing must be done carefully, because if a memory cell is
overerased, its threshold voltage may become negative, causing the cell to operate incorrectly.
Section 19.5.6, Erasing Flowchart and Sample Program shows an optimal erase control flowchart
and sample program.
Table 19.2 Principle of Memory Cell Operation
Program
Memory
cell
Memory
Vd
array
Rev. 7.00 Sep 21, 2005 page 584 of 878
REJ09B0259-0700
Erase
Vg = V
PP
Vs = V
Vd
0 V
V
PP
0 V
0 V
= 12 V))
PP
Open
PP
Open Open
0 V
V
PP
0 V
Read
Vg = V
CC
Vd
Vd 0 V
V
CC
0 V
0 V