BCM5718 Programmer's Guide
•
Bit [0]: Update bit
•
Bit [31:1]: Reserved 0x0
Status Block and INT MailBox Addresses
Each status block may be placed in an independent host memory address (64-bit). Each vector may be
acknowledged via associated INT MailBoxes.
Table 18: Status Block Host Addresses and INT MailBox Addresses
Status Block Host
Status
Address Register
Block #
(64-Bit)
Legacy
0x3C3C, 0x3C38
0
x3C3C, 0x3C38
1
0x3D00, 0x3D04
2
0x3D08, 0x3D0C
3
0x3D10, 0x3D14
4
0x3D18, 0x3D1C
5
0x3D20, 0x3D24
The Status word field contains bit flags that contain error information about the status of the controller. The
defined flags are listed in
Bits
Name
0
Updated
Broadcom
®
January 29, 2016 • 5718-PG108-R
INT MailBox
Register
Address
0x200
0x200
0x208
0x210
0x218
0x220
N/A
Table
19.
Table 19: Status Word Flags
Description
This bit is always set to 1 each time the status block is updated in the host via
DMA. It is expected that host software clear this bit in the status block each time
it examines the status block. This provides the host driver with a mechanism to
determine whether the status block has been updated since the last time the
driver looked at the status block.
RSS Mode
Indication
Items
All
Link-Status change
Error/Attention
SBD Ring 1 Cons Index
Std RBD Cons Index
Jmb RBD Cons Index
Rx Return Ring 0
Prod Index
Rx Return Ring 1
Prod Index
Rx Return Ring 2
Prod Index
Rx Return Ring 3
Prod Index
N/A
Status Block
Comments
Legacy status block
Used by INTx or MSI
Used in all MSI-X modes for
Vector#0
Used only in MSI-X multivector
RSS mode or multivector EAV
mode for Vector#1–Vector#4
Used only in MSI-X multivector
EAV mode for Vector#5
Page 86
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