Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual page 434

BCM5718 Programmer's Guide
Name
PCI Request Burst Length for
LSO engine
Reserved
Read DMA PCI-X Split
Transaction Timeout Expired
Attention Enable
Read DMA Local Memory
Write Longer Than DMA
Length Attention Enable
Read DMA PCI FIFO Overread
Attention Enable
Read DMA PCI FIFO Underrun
Attention Enable
Read DMA PCI FIFO Overrun
Attention Enable
Read DMA PCI Host Address
Overflow Error Attention
Enable
Read DMA PCI Parity Error
Attention Enable
Read DMA PCI Master Abort
Attention Enable
Read DMA PCI Target Abort
Attention Enable
Enable
Reset
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits Access Value
17:16 RW 0
15:11 RO 0
10 RW 0
9 RW 0
8 RW 0
7 RW 0
6 RW 0
5 RW 0
4 RW 0
3 RW 0
2 RW 0
1 RW 1
0 RW 0
Description
The two bits define the burst length that the
RDMA read engine would request to the PCI
block.
• 00 = 128B
• 01 = 256B
• 10 = 512B
• 11 = 4KB
Note: The actual size of the resulting PCIe
memory read transaction may be further limited
by the PCIe Maximum Read Request Size
(MRRS) field of the PCIe Device Status Control
Register (0xB4).
–
Enable read DMA PCI-X split transaction timeout
expired attention.
Enable Read DMA Local Memory Write Longer
Than DMA Length Attention.
Enable Read DMA PCI FIFO Overread Attention
(PCI read longer than DMA length.)
Enable Read DMA PCI FIFO Underrun Attention.
Enable Read DMA PCI FIFO Overrun Attention.
Enable Read DMA PCI Host Address Overflow
Error Attention. A host address overflow occurs
when a single DMA read begins at an address
below 4 GB and ends on an address above 4 GB.
This is a fatal error.
Enable Read DMA PCI Parity Error Attention.
Enable Read DMA PCI Master Abort Attention.
Enable Read DMA PCI Target Abort Attention.
This bit controls whether the Read DMA state
machine is active or not. When set to 0, it
completes the current operation and cleanly
halts. Until it is completely halted, it remains one
when read.
When this bit is set to 1, the Read DMA state
machine is reset. This is a self-clearing bit.
RDMA Registers
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