Advanced Error Reporting Enhanced Capability Header (Offset: 0X100); Uncorrectable Error Status Register (Offset: 0X104) - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

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BCM5718 Programmer's Guide
Advanced Error Reporting Enhanced Capability Header (offset:
0x100)
Name
PCI Express Extended
Capability ID
Capability Version
Next Capability Offset

Uncorrectable Error Status Register (offset: 0x104)

This register is reset by Hard Reset.
Name
Reserved
Unsupported Request Error
Status
ECRC Error Status
Malformed TLP Status
Receiver Overflow Status
Unexpected Completion
Status
Completer Abort Status
Completion Timeout Status
Flow control Protocol Error
Status
Poisoned TLP Status
Reserved
Data Link Protocol Error
Status
Reserved
Training Error Status
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits
Access
Value
15:0
RO
0x0001
19:16
RO
0x1
31:20
RO
0x13C
Default
Bits
Access
Value
31:21
RO
0
20
RW1CS 0
19
RW1CS 0
18
RW1CS 0
17
RW1CS 0
16
RW1CS 0
15
RW1CS 0
14
RW1CS 0
13
RW1CS 0
12
RW1CS 0
11:5
RO
0
4
RW1CS 0
3:0
RO
0
0
RW1CS 0
Description
Extended Capability ID for the Advanced Error
Reporting Capability is 0001h
Pointer to the Virtual Channel Capability Structure
Description
This bit is set when an unsupported request error
occurs.
This bit is set when an ECRC error occurs
This bit is set when a Malformed TLP error occurs.
This bit is set when a Receiver Overflow error
occurs.
This bit is set when an Unexpected Completion
error occurs.
This bit is set when a completer Abort error
occurs.
This bit is set when completion timeout error
occurs.
This bit is set when a Flow control protocol error
occurs.
This bit is set when a Poisoned TLP error occurs
This bit is set when a Data Link Protocol error
occurs.
This bit is set when a training error occurs.
PCI Configuration Registers
Page 301

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