Padring Control Register (Offset: 0X3668) - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide
Name
Current port strap value
RXCPU SPAD ECC ENABLE 4
RXMBUF ECC ENABLE
TXMBUF ECC ENABLE
Debug UART Port Switch
Mission board SerDes mode
enable

Padring Control Register (offset: 0x3668)

This register is reset by POR Reset or CPMU Register Software Reset.
Name
Reserved
APE Status
Eclk switch using link status
Disable
OOB Power Consumption FIX
for 5784 Option 4
OOB Power Consumption FIX
for 5784 Option 3
OOB Power Consumption FIX
for 5784 Option 2
OOB Power Consumption FIX
for 5784 Option 1
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits Access Value
5 RW 0x0
RW 0x0
3 RW 0x0
2 RW 0x0
1 RW 0x0
0 RW 0x0
Default
Bits Access Value
31:27 DC 0x0
26 RW 0
25 RW 0x0
BCM5718
0x1
BCM5719
24 RW 0x0
23 RW 0x0
22 RW 0x0
21 RW 0x0
Central Power Management Unit (CPMU) Registers
Description
This bit is used by the APE to deposit the current
port's strap value decoded from the CPMU
debug register. Please note, the bit is only
applicable to BCM5718 family A0 when APE
path code is enabled.
0x0: GPHY mode
0x1: SERDES mode
Enable ECC for rxcpu scratchpad.
Enable RXMBUF ECC.
Enable TXMBUF ECC.
Invert the current value of this bit to switch to the
other port.
Enable SerDes test mode on mission board.
Description
Readable and writeable reserved bits.
This bit is used by bootcode to post the APE
initialization status.
Switch emac clocks to core clock based on lnk
state.
0: Enable
1: Disable
Enable fix for OOB Power Consumption FIX for
5784 option 4.
1 = Enable
0 = Disable
Disable fix for OOB Power Consumption FIX for
5784 option 3.
1 = Enable
0 = Disable
Disable fix for OOB Power Consumption FIX for
5784 option 2.
1 = Disable
0 = Enable
Enable fix for OOB Power Consumption FIX for
5784 option 1.
1 = Enable
0 = Disable
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