Operational Characteristics; Read/Write Dma Engines; Expansion Rom; Description - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide

Expansion ROM

Operational Characteristics

Read/Write DMA Engines

Software must enable the bus master DMA bit for the Ethernet controller. The Ethernet controller is a bus-
mastering device and the PCI interface requires that the Bus_Master enable bit be set by either the BIOS or
host device driver. The bus master is the PCI transaction initiator. A PCI target will claim the transaction driven
by the bus master. The Bus_Master enable bit is located in the PCI configuration space Command register and
this bit is read/write. The bit defaults to cleared/disabled after device reset.
The read and write DMA channels use FIFOs to buffer small amounts of PCI bus data. The FIFOs provide
elasticity for data movement between internal memory and the PCI interface. Host software may configure DMA
watermarks—values where PCI activity is enabled/disabled.
When enqueued data is less than the watermark value, PCI bus transactions are inhibited. The DMA channel
will wait until the FIFO fills above the threshold before initiating PCI transactions. Host software may configure
the DMA_Write_Watermark bit fields to set the activity threshold in the write FIFO. The DMA_Write_Watermark
bit field is read/write and is also located in the DMA Read/Write register. The write watermark registers default
to zero after power-on reset.
Expansion ROM

Description

The expansion ROM on the Ethernet controller is intended for implementation of PXE (Preboot Execution
Environment). The devices support expansion ROM of up to 16 MB.
Operational Characteristics
By default, the Expansion ROM is disabled and the firmware has to explicitly enable this feature by setting
PCI_State.PCI_Expansion_ROM_Desired bit to one (see "PCI State Register (offset: 0x70)" on page 285).
Once this bit is enabled, the boot code firmware handles the Expansion ROM accesses of the device.

BIOS

The BIOS detects if a PCI device supports Expansion ROM or not by writing the value 0xFFFFFFFE to
Expansion_ROM_Base_Register (register 0x30 of PCI configuration). The BIOS then reads back from this
register. If the value is nonzero, then this PCI device supports Expansion ROM; otherwise, it does not. The
Ethernet controller returns a nonzero value appropriate for the expansion ROM size selected in NVRAM (see
Section 4: "Common Data Structures," on page 69) when Expansion ROM is enabled
(PCI_State.PCI_Expansion_ROM_Desired bit is set to 1). On the other hand, if the
PCI_Expansion_ROM_Desired bit cleared, then the Ethernet controller returns a value of 0x00000000. This
indicates to the BIOS that no Expansion ROM is supported.
Broadcom
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January 29, 2016 • 5718-PG108-R Page 187