BCM5718 Programmer's Guide
Link Status Change Indications
It is advantageous for host software to know when the status of the Ethernet link has changed. To generate an
interrupt to the host when link status changes, software should set the
Ethernet_MAC_Event_Enable.Link_State_Changed bit (see
page
312) and the Mode_Control.Interrupt_on_MAC_Attention bit (see
0x6800)" on page
468). With this configuration, the Ethernet_MAC_Status.Link_State_Changed bit and
Link_State_Changed bit in the status block (see
changed state.
Configuring the GMII/MII PHY
GMII/MII transceivers (PHYs) contain registers that a software driver can manipulate to change parameters in
the PHY. These parameters include the link speed or duplex that the PHY is currently running at, or the speed/
duplex options that the PHY advertises during the auto-negotiation process. NIC device drivers will typically
access PHY registers during the driver initialization process to configure the PHYs speed/duplex or to examine
the results of the auto-negotiation process.
The integrated PHY registers are accessed via a process called MDIO. The integrated PHY is connected to the
Ethernet controller through an internal MDIO bus (MDIO and MDC pins). Software accesses PHY's registers via
MDIO through the Ethernet controller's MII_Communication register. The following example code describes
accessing the PHY registers through the MII_Communication registers of the Ethernet controller.
Reading a PHY Register
// Setup the value that we are going to write to MI Communication register
// Set bit 27 to indicate a PHY read.
// Set bit 29 to indicate the start of a MDIO transaction
Value32 = ((PhyAddress << 21) | (PhyRegOffset << 16) | 0x28000000)
// Write value to MI communication register
MII_Communication_Register = Value32
// Now read back MI Communication register until the start bit
// has been cleared or we have timed out (>5000 reads)
Loopcount = 5000
While (LoopCount > 0)
Begin
Value32 = MII_Communication_Register
If (!(Value32 | 0x20000000)) then BREAK loop
Else Loopcount--
End
// Print message if error
If (Value32 | 0x20000000) then
Begin
// It a debug case–cannot read PHY
Procedure (Print Error Message)
Value32 = 0
End
// Now return the value that we read (lower 16 bits of reg)
Return (Value32 & 0xffff)
Writing a PHY Register
// Setup the value that we are going to write to MI Communication register
Broadcom
®
January 29, 2016 • 5718-PG108-R
"EMAC Event Enable Register (offset: 0x408)" on
"Mode Control Register (offset:
"Status Block" on page
82) will be set when the link has
GMII/MII
Page 204
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