Lso Read Dma Status Register (Offset: 0X4804); Lso Read Dma Programmable Ipv6 Extension Header Register (Offset: 0X4808) - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

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BCM5718 Programmer's Guide

LSO Read DMA Status Register (offset: 0x4804)

Name
Reserved
Read DMA PCI-X Split
Transaction Timeout Expired
Read DMA Local Memory
Write Longer Than DMA
Length Error
Read DMA PCI FIFO Overread
Error
Read DMA PCI FIFO Underrun
Error
Read DMA PCI FIFO Overrun
Error
Read DMA PCI Host Address
Overflow Error
Read DMA PCI Parity Error
Read DMA PCI Master Abort
Read DMA PCI Target Abort
Reserved
LSO Read DMA Programmable IPv6 Extension Header Register
(offset: 0x4808)
Name
Programmable Extension
Header Type #2 Enable
Programmable Extension
Header Type #1 Enable
Reserved
Programmable Extension
Header Type #2
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits
Access
Value
31:11
RO
0
10
W2C
0
9
W2C
0
8
W2C
0
7
W2C
0
6
W2C
0
5
W2C
0
4
W2C
0
3
W2C
0
2
W2C
0
1:0
RO
0
Default
Bits
Access
Value
31
RW
0
30
RW
0
29:16
RO
0
15:8
RW
0
Description
Read DMA PCI-X split transaction timeout
expired.
Read DMA Local Memory Write Longer Than
DMA Length Error.
Read DMA PCI FIFO Overread Error (PCI read
longer than DMA length.)
Read DMA PCI FIFO Underrun Error.
Read DMA PCI FIFO Overrun Error.
Read DMA PCI Host Address Overflow Error. A
host address overflow occurs when a single DMA
read begins at an address below a multiple of
4 GB and ends at an address above the same
multiple of 4 GB (i.e., the host memory address
transitions from 0xXXXXXXXX_FFFFFFFF to
0xYYYYYYYY_00000000 in a single read). This
is a fatal error.
Read DMA PCI Parity Error.
Read DMA PCI Master Abort Error.
Read DMA PCI Target Abort Error.
Description
This bit enables programmable extension header
#1. If this bit is clear, then the value programmed
in bits [15:8] of this register will be ignored. If this
bit is set, then extension headers will be checked
for a type matching the value in bits [15:8].
This bit enables programmable extension header
#1. If this bit is clear, then the value programmed
in bits [7:0] of this register will be ignored. If this
bit is set, then extension headers will be checked
for a type matching the value in bits [7:0].
These bits contain the programmable extension
header value for programmable header #2.
RDMA Registers
Page 435

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