Operational Characteristics; Internal Memory; Wol Pattern Configuration Register; Table 74: Required Memory Regions For Wol Pattern - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide

Operational Characteristics

Internal Memory

The WOL pattern must be stored in the Ethernet controller miscellaneous memory region. All memory locations
require the host software to reinitialize the WOL pattern before each D0 to D3 transition. The RX/TX MAC places
packets into this internal memory and the WOL pattern is overwritten during normal operation. When the
Ethernet controller operates in D0 state, internal data structures use the same memory location as the WOL
pattern. Host software should reinitialize the WOL pattern before each WOL sleep transition.
Table 74 shows the required memory regions for the WOL pattern.
Internal Address Range
0x8000–0x8FFF
For 5718 Family chip, the address range starts from 0x20000 (ASF Disable) / 0x24000 (ASF Enable).
WOL Pattern Pointer Register
The WOL_Pattern_Pointer specifies a location within Ethernet controller address space where the pattern
buffers reside (see "WOL Pattern Pointer Register (offset: 0x430)" on page 316
internal memory subsection discusses how host programmers can choose an address range. The
WOL_Pattern_Pointer register uses a pointer value, not an internal memory location. The pointer value is
calculated by dividing an internal memory location by the value 8. Do not program the WOL_Pattern_Pointer
register with the actual internal memory location. Rather, host software must first convert the base address to a
pointer value. Here are example conversion from memory base to pointer values:
• 0x0000 (Misc Memory)/8 = 0x00 (required value)
• 0x400 (base addr)/8 = 0x80 (pointer value)
• 0x8000 (base addr)/8 = 0x1000 (pointer value)
• 0xF000 (base addr)/8 = 0x1E00 (pointer value)

WOL Pattern Configuration Register

The WOL_Pattern_Configuration register contains two programmable data fields. Both fields use different units
of measurement, so the host programmer should be careful (see
0x434)" on page 316 for the register definition). This register is used to position and extract data from RX
Ethernet frames.
• Offset Field—The Offset field in the WOL_Pattern_Configuration register specifies a position in RX
Ethernet frame(s), where comparisons for WOL patterns should begin. This register uses a unit of
measurement specified in terms of 2-byte chunks. Software should not program this field with a byte value,
but should first normalize to a 2-byte unit. Hardware cannot begin WOL comparisons on odd byte
alignments (i.e., 3,5,7,9 offsets). Host software must begin all pattern matching on even byte boundaries
(i.e., 2,4,6,8 offsets). The 2 bytes per unit forces even byte alignment. For example:
– 0x14 (byte offset)/2 = 0x0A (register ready)
– 0x28 (byte offset)/2 = 0x14 (register ready)
Broadcom
®
January 29, 2016 • 5718-PG108-R

Table 74: Required Memory Regions for WOL Pattern

Size
8 KB
Name
Miscellaneous Memory Region
"WOL Pattern Configuration Register (offset:
Wake on LAN Mode/Low-Power
for the register definition). The
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