Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual page 295

BCM5718 Programmer's Guide
Name
HW_AUTO_WIDTH_DIS
EN_CLK_PW_MGMT
LINK_CR_EXT_SYNC
LINK_CR_COMMON_CLK
CFG_PSM_RETRAIN_LINK
CFG_PSM_LINK_DISABLE
RCB
Unused0
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits Access Value
9 RO 0
8 RW 0
7 RW 0
6 RW 0
5 RO 0
4 RO 0
3 RW 0
2 RO 0
Description
Hardware Autonomous Width Disable: When Set,
this bit disables hardware from changing the Link
width for reasons other than attempting to correct
unreliable Link operation by reducing Link width.
Other functions are reserved. RC: Not applicable
and hardwire to 0 EP: If supported, only apply to
function0. Not implemented and hardwire to 0.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Enable Clock Power Management: RC: N/A and
hardwired to 0. EP: When this bit is set, the device
is permitted to use CLKREQ# signal to power
management. Feature is enabled through
version.v define
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Extended Synch. This bit when set forces the
transmission of 4096 FTS ordered sets in the L0s
state followed by a single SKP ordered set prior to
entering the L0 state, and the transmission of
1024 TS1 ordered sets in the L1 state prior to
entering the Recovery state. Value used by logic
is resolved to 1 if either function has this bit set.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Common Clock Configuration. Value used by logic
is resolved to 1 only if both functions (when
enabled) have this bit set. Path=
i_cfg_func.i_cfg_public.i_cfg_exp_cap
Requesting PHY to retrain the link. This bit is only
applicable to RC. So for EP it is read only bit.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Requesting PHY to disable the link. This bit is only
applicable to RC. So for EP it is read only bit.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Read Completion Boundary.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Value Name Description
0 64 64 Bytes
1 128 128 Bytes
255 – end_of_table
–
PCI Configuration Registers
Page 295