Eav Reference Corrector; Time Watchdogs; Divided Eav Reference Clock Output - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide

EAV Reference Corrector

EAV Reference Corrector
The 64-bit of EAV Ref Count described in the previous section is the integer porting of the counter. This is the
part visible to the system for time stamping purposes. There is also a 24-bit correction field associated with the
EAV Reference Count. This field is used by the host system to periodically add or subtract a minimum resolution
value from the EAV Reference Count, in case of 5719/5720. That value happens to be 8 nanoseconds. This
feature is mainly used to compensate for the local crystal/PLL drifts. The add/subtract operation is performed
entirely in hardware. Software is responsible only for programming the EAV Reference Corrector field
appropriately.
The Corrector features a Correction-Value and a Correction-Sense sub-field. Host software (in this case the
software PTP module) must compute the correction amount and then load the Correction-Value/Sense fields
accordingly. The programmed value could be anything from 0x000001 through 0xFFFFFF. A value 0x0 is NOT
permitted. The Correction-Value is added to a 24-bit accumulator every EAV Reference Clock tick (accumulator
is re-initiated to 0 at POR reset and every time the Corrector register is updated). Therefore, the accumulator's
value will increase with every EAV Ref clock cycle until it overflows. In the EAV Reference Clock tick in which
the accumulator overflows, the hardware reloads the accumulator with the last programmed Correction-Value.
On the same clock cycle, based on the programmed Correction-Sense, the hardware either adds or subtracts
8 ns from EAV Reference Count. Therefore, the host software controls the sense, value, and period of an
automatic hardware based correction. Although software may re-program the EAV Reference Corrector
frequently, be cautious that a large negative correction-value may result in out of order time-stamps.

Time Watchdogs

A Time Watchdog is a 64-bit register which may be programmed by host software to a specific time value in the
future. When the value of the EAV Reference Count equates the value of the Time Watchdog, the1588_GPIO[n]
output pin is toggled. There are two such Time Watchdogs which work independently.

Divided EAV Reference Clock Output

An additional PLL channel output has been routed to an external pin. This output clock is edge synchronous to
the EAV Reference clock, although there could be a < 5ns routing delay present. A register is available in the
CPMU block in which the clock-divisor value may be programmed by host software. The available output
frequency range is 125 MHz through 4.8 MHz. See the Flash Clock Policy Register (0x366C).
Broadcom
®
January 29, 2016 • 5718-PG108-R Page 156