Link_Status_Control - 0Xbc - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide
Name
MAX_LINK_SPEED
LINK_STATUS_CONTROL – 0xbc
Name
Unused3
DL_ACTIVE
SLOT_CLK_CONFIG
LINK_TRAINING
Unused2
NEG_LINK_WIDTH
NEG_LINK_SPEED
Unused1
LINK_BW_INT_EN
LINK_BW_MGMT_INT_EN
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits Access Value
3:0 RO 0x1
Default
Bits Access Value
31:30 RO 0
29 RO 0
28 RO 0x1
27 RO 0
26 RO 0
25:20 RO 0
19:16 RO 0
15:12 RO 0
11 RO 0
10 RO 0
Description
Value Name
0 64
1 128
255 –
Description
–
Data Link Layer Link Active: returns a 1b to
indicate the DL_Active state, 0b otherwise. Not
implemented and hardwire to 0.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Slot Clock configuration. This bit is read-only by
host, but read/write via backdoor CS bus.
Path= i_cfg_func.i_cfg_private
EP: This bit is N/A and is hardwired to 0.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
–
Negotiated Link Width. These bits indicate the
negotiated link width of the PCI Express link.
Path= i_pl_top.i_pl_ltssm
Link Speed. These bits indicate the negotiated link
speed of the PCI Express link.
Path= i_pl_top.i_pl_ltssm
–
Link Autonomous Bandwidth Interrupt Enable:
When Set, this bit enables the generation of an
interrupt to indicate that the Link Autonomous
Bandwidth Status bit has been Set. RC: Not
implemented and hardwired to 0. EP: N/A and
hardwired to 0
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Link Bandwidth Management Interrupt Enable:
when Set, this bit enables the generation of an
interrupt to indicate that the Link Bandwidth
Management Status bit has been Set. RC: N/A
and hardwired to 0. EP: Not implemented and
hardwired to 0.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
PCI Configuration Registers
Description
64 Bytes
128 Bytes
end_of_table
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