Send Data Initiator Registers; Send Data Initiator Mode Register (Offset: 0Xc00); Send Data Initiator Status Register (Offset: 0Xc04); Send Data Initiator Statistics Control Register (Offset: 0Xc08) - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide

Send Data Initiator Registers

All registers reset are core reset unless specified.

Send Data Initiator Mode Register (offset: 0xC00)

Name
Reserved
Incorrect BD flag fix disable
Reserved
Multiple Segment Enable
Pre-DMA Debug
Hardware Pre-DMA Enable
Stats Overflow Attn Enable
Enable
Reset

Send Data Initiator Status Register (offset: 0xC04)

Name
Reserved
Stats Overflow Attention
Reserved

Send Data Initiator Statistics Control Register (offset: 0xC08)

Name
Reserved
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits Access Value
31:9 RO 0
8 RW 0
7:6 RO 0
5 RW 0
4 RW 0
3 RW 0
2 RW 0
1 RW 1
0 RW 0
Default
Bits Access Value
31:3 RO 0
2 RO 0
1:0 RO 0
Default
Bits Access Value
31:5 RO 0
Send Data Initiator Registers
Description
–
Disable fix for SDI sends incorrect last BD flag to
SBDS.
–
Enable RDMA to read multisegment (up to four
segments) in one DMA request during TCP
segmentation.
When this bit is set, Send Data Initiator state
machine will be halted if the pre-DMA bit of the
Send BD is set.
Enable hardware LSO pre-DMA processing.
Enable attention for statistics overflow.
This bit controls whether the Send Data Initiator
state machine is active or not. When set to 0, it
completes the current operation and cleanly
halts. Until it is completely halted, it remains one
when read.
When this bit is set to 1, Send Data Initiator state
machine is reset.
This is a self-clearing bit.
Description
–
A statistics managed by Send Data Initiator has
overflowed.
–
Description
–
Page 345