Eee Debounce Timer 2 Control Register (Offset: 0X36B8); Eee Link Idle Control Register (Offset: 0X36Bc) - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide

EEE Debounce Timer 2 Control Register (offset: 0x36B8)

Name
APE Transmit Debounce Timer 31:16
Send Index Equal Debounce
Timer

EEE Link Idle Control Register (offset: 0x36BC)

Name
Reserved
PCIE not in L0 State
Reserved
MDIO Idle
Debug UART Idle
APE TX Packet Buffer Empty 1
LAN TX Packet Buffer Empty
Broadcom
®
January 29, 2016 • 5718-PG108-R
Default
Bits Access Value
RW 0x3F
15:0 RW 0x3F
Default
Bits Access Value
31:25 RO 0x0
24 RW 0x0
23:4 RW 0x0
3 RW 0x0
2 RW 0x0
RW 0x0
0 RW 0x0
Central Power Management Unit (CPMU) Registers
Description
APE transmit debounce timer in us.
Default is 63 µs.
Send producer and consumer index equal
debounce timer in µs.
Default is 63 µs.
Description
–
PCIE status control.
1: disable this idle condition from the EEE idle
detection logic.
0: enable this idle condition in the EEE idle
detection logic UART is idle.No on-going MDIO
access.IE is in L0s, L1 or L2 state.
–
MDIO status control.
1: disable this idle condition from the EEE idle
detection logic.
0: enable this idle condition in the EEE idle
detection logic UART is idle.No on-going MDIO
access.
Debug UART status control.
1: disable this idle condition from the EEE idle
detection logic.
0: enable this idle condition in the EEE idle
detection logic UART is idle.
APE subsystem internal packet buffer status
control.
1: disable this idle condition from the EEE idle
detection logic.
0: enable this idle condition in the EEE idle
detection logic.
LAN core internal packet buffer status control.
1: disable this idle condition from the EEE idle
detection logic.
0: enable this idle condition in the EEE idle
detection logic.
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