Integrated Macs; Table 81: Magic Packet Detection Logic Enable; Table 82: Integrated Mac Wol Mode Control Registers - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide
"Only a frame that passes the device's MAC, broadcast, or multicast address filter and matches on the
previously loaded sample patterns will cause the wake-up signal to be asserted."
The ACPI_Power-on bit needs to be set for pattern match, but not for Magic Packet recognition. The Magic
Packet detection mechanism is separate from the pattern match mechanism. Host software may configure WOL
using four filter permutations:
• Pattern match WOL disabled. Magic Packet disabled.
• Pattern match WOL enabled. Magic Packet disabled.
• Pattern match WOL disabled. Magic Packet enabled.
• Pattern match WOL enabled. Magic Packet enabled.
Register
PCI Power_Management_Control/Status
PCI Power_Management_Control/Status
Ethernet_MAC_Mode
Ethernet_MAC_Mode

Integrated MACs

Table 82 lists the WOL mode control registers in the Ethernet controllers.
Register Bit(s) Name
WOL_Pattern_ All
Pointer
WOL_Pattern_ Length
Configuration
Offset
Ethernet_MAC_ Port_Mode
Mode
Magic_Packet_
Detection
Promiscuous_mode
Broadcom
®
January 29, 2016 • 5718-PG108-R

Table 81: Magic Packet Detection Logic Enable

Bit(s)
PME_Enable
Power_State
ACPI_Power-On
Magic_Packet_Detection

Table 82: Integrated MAC WOL Mode Control Registers

Description
This register points to an internal
memory location. Programmers
should calculate pointer value by
dividing a base address by 8.
The number of memory arbiter
clock cycles needed to read X bytes
in the RX stream/frame.
The number of bytes into the RX
stream/frame to begin the pattern
comparison.
This bit field specifies the type of
interface the Ethernet controller
port is currently using: MII, GMII, or
none.
Enable WOL pattern filtering.
All frames are forwarded, without
any filtering, when this bit is
enabled.
Wake on LAN Mode/Low-Power
Recommended Value
Enable
0x03
See above
See above
Cross Reference
"WOL Pattern Pointer
Register (offset: 0x430)" on
page 316.
"WOL Pattern Configuration
Register (offset: 0x434)" on
page 316.
"EMAC Mode Register
(offset: 0x400)" on
page 310.
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