Nvm Config 1 Register (Offset: 0X7014) - Broadcom NetXtreme/NetLink BCM5718 Series Programmer's Manual

BCM5718 Programmer's Guide

NVM Config 1 Register (offset: 0x7014)

Name
SEE_CLK_DIV
Enable
Page Size
Reserved
Reserved–Safe Erase 26
Flash Size–strap bit 3 25
Protect Mode–strap bit
2
Strap bit 5
Strap bit 4
SEE_CLK_DIV
SPI_CLK_DIV 10:7
Broadcom
®
January 29, 2016 • 5718-PG108-R
Bits Access Default Value
31 0 RW
30:28 Depend RW
s on
flash
strappin
g
27 RO
RO 0
RO Pin
24 RO pin
23 RO pin
22 RO pin
21:11 RW 16
RW 4
Non-Volatile Memory (NVM) Interface Registers
Description
This bit enables 0x7014[21:11] as the
SEE_CLK_DIV count for EPROM clock
generation.
1 = Enable
0 = Disable
These bits indicate the page size of the attached
flash device. They are set automatically
depending on the chosen flash as indicated by
the strapping option pins.
Page sizes are as follows:
000b: 256 bytes
001b: 512 bytes
010b: 1024 bytes
011b: 2048 bytes
100b: 4096 bytes
101b: 264 bytes
110b: reserved
111b: reserved
–
–
–
–
–
–
This field is a divisor used to create all 1x times
for all SEEPROM interface I/O pin timing
definitions. A value of 0 means that an SCL
transitions at a minimum of each CORE_CLK
rising edge.
The equation to calculate the clock freq. for SCL
is:
CORE_CLK / ((SEE_CLK_DIV + 1) * 4)
This field is a divisor used to create all 1x times
for all Flash interface I/O pin timing definitions. A
divisor of 0 means that an SCK transitions at a
minimum of each CORE_CLK rising edge.
The equation to calculate the clock freq. for SCK
is:
CORE_CLK / ((SPI_CLK_DIV + 1) * 2)
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