NEC VR4181 mPD30181 User Manual page 8

64-/32-bit microprocessor hardware
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p. 198
Modification of description of Cautions in 10.5.4 Activation via DCD interrupt request
pp. 201 to 204
Modification of descriptions in 10.6.1 through 10.6.4
pp. 205 to 207
Addition of 10.6.5 through 10.6.8
Modification of description for bit 6 in 10.7.1 PMUINTREG (0x0B00 00A0)
p. 209
p. 211
Modification of value at reset for bit 7 in 10.7.2 PMUCNTREG (0x0B00 00A2)
p. 214
Modification of description for bit 2 to 0 in 10.7.4 PMUDIVREG (0x0B00 00AC)
p. 215
Modification of description for bit 4 in 10.7.5 DRAMHIBCTL (0x0B00 00B2)
Modification of value at reset for bit 15 in 11.2.2 (3) ECMPHREG (0x0B00 00CC)
p. 220
p. 238
Modification and addition of descriptions in 13.1.3 General-purpose registers
p. 242
Modification of description in 13.2.5 16-bit bus cycles
p. 254
Modification of R/W for bits 15 to 8 in 13.3.5 GPDATHREG (0x0B00 0308)
Modification of description in 13.3.15 KEYEN (0x0B00 031C)
p. 267
p. 270
Modification of description for bit 15 in 13.3.19 PCS1STRA (0x0B00 0326)
p. 273
Modification of description for bit 7 in 13.3.23 LCDGPMODE (0x0B00 032E)
p. 275
Addition of Caution in 14.1 General
p. 283
Modification of location of Note in Table 14-3. PIUCNTREG Bit Manipulation and States
p. 286
Modification of description for bits 5 to 0 in 14.3.4 PIUSTBLREG (0x0B00 0128)
p. 289
Addition of description in 14.3.6 PIUASCNREG (0x0B00 0130)
Modification of description in Table 14-4. PIUASCNREG Bit Manipulation and States
p. 290
p. 291
Addition of description in 14.3.7 PIUAMSKREG (0x0B00 0132)
p. 292
Modification of values at reset for bits 2 to 0 in 14.3.8 PIUCIVLREG (0x0B00 013E)
p. 295
Modification of description in Table 14-7. Mask Clear During Scan Sequencer Operation
Addition of Note in Figure 14-6. Touch/Release Detection Timing
p. 298
p. 298
Modification of Figure 14-7. A/D Port Scan Timing
p. 301
Modification of description and addition of Caution in 15.1 General
pp. 303, 304
Modification of addresses in 15.2.1 SDMADATREG (0x0B00 0160) and 15.2.2 MDMADATREG
(0x0B00 0162)
p. 308
Modification of values at reset for bits 11, 10 and 5 and addition of Caution in 15.2.6 SCNVC_END
(0x0B00 016E)
p. 314
Modification of values at reset for bits 11, 10 and 5 and addition of Caution in 15.2.12 MCNVC_END
(0x0B00 017E)
pp. 315, 316
Addition of descriptions in 15.3.1 Output (speaker) and 15.3.2 Input (microphone)
Modification of description in 16.2.6 Interrupts and status reporting
p. 320
p. 321
Modification of description in Table 16-3. KIU Interrupt Registers
p. 324
Modification of description for bits 1 and 0 in 16.3.3 KIUSCANS (0x0B00 0192)
p. 325
Modification of descriptions for bits 14 to 10 and bits 4 to 0 in 16.3.4 KIUWKS (0x0B00 0194)
p. 327
Modification and addition of descriptions for bits 2 to 0 in 16.3.6 KIUINT (0x0B00 0198)
p. 328
Modification of signal name in 17.1 General
8
Major Revisions in This Edition (3/5)
User's Manual U14272EJ3V0UM
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