Speaker Source 1 Address Registers - NEC VR4181 mPD30181 User Manual

7.2.3 Speaker source 1 address registers

(1) SPKRSRC1REG1 (0x0A00 0028)
Bit 15
Name SS1A15
R/W R/W
At reset 0
Bit 7
Name SS1A7
R/W R/W
At reset 0
Bit Name
15 to 0 SS1A(15:0)
(2) SPKRSRC1REG2 (0x0A00 002A)
Bit 15
Name SS1A31
R/W R/W
At reset 0
Bit 7
Name SS1A23
R/W R/W
At reset 0
Bit Name
15 to 0 SS1A(31:16)
These two registers specify the source memory address of the primary DMA buffer for the Speaker channel.
CHAPTER 7 DMA CONTROL UNIT (DCU)
14 13
SS1A14 SS1A13 SS1A12
R/W R/W
0 0
6 5
SS1A6 SS1A5
R/W R/W
0 0
Lower 16 bits (A(15:0)) of DMA source 1 address for Speaker
14 13
SS1A30 SS1A29 SS1A28
R/W R/W
0 0
6 5
SS1A22 SS1A21 SS1A20
R/W R/W
0 0
Upper 16 bits (A(31:16)) of DMA source 1 address for Speaker
User's Manual U14272EJ3V0UM
12 11
SS1A11 SS1A10
R/W R/W
0 0
4 3
SS1A4 SS1A3 SS1A2
R/W R/W
0 0
Function
12 11
SS1A27 SS1A26
R/W R/W
0 0
4 3
SS1A9 SS1A18
R/W R/W
0 0
Function
10 9
SS1A9 SS1A8
R/W R/W R/W
0 0
2 1
SS1A1 SS1A0
R/W R/W R/W
0 0
10 9
SS1A25 SS1A24
R/W R/W R/W
0 0
2 1
SS1A17 SS1A16
R/W R/W R/W
0 0
8
0
0
0
8
0
0
0
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