Gpmd0Reg (0X0B00 0300) - NEC VR4181 mPD30181 User Manual

13.3.1 GPMD0REG (0x0B00 0300)

Bit 15
Name GP7MD1
R/W R/W
RTCRST 0
Note
Other resets
Bit 7
Name GP3MD1
R/W R/W
RTCRST 0
Other resets Note
Bit Name
15, 14 GP7MD(1:0)
13, 12 GP6MD(1:0)
11, 10 GP5MD(1:0)
9, 8 GP4MD(1:0)
7, 6 GP3MD(1:0)
Note Holds the value before reset
246
CHAPTER 13 GENERAL PURPOSE I/O UNIT (GIU)
14 13
GP7MD0 GP6MD1 GP6MD0
R/W R/W
0 0
Note Note
6 5
GP3MD0 GP2MD1 GP2MD0
R/W R/W
0 0
Note Note
These bits control direction and function of the GPIO7 pin as follows:
00 : General-purpose input
01 : RFU
10 : General-purpose output
11 : SIU2 DTR2# output
These bits control direction and function of the GPIO6 pin as follows:
00 : General-purpose input
01 : RFU
10 : General-purpose output
11 : SIU2 RTS2# output
These bits control direction and function of the GPIO5 pin as follows:
00 : General-purpose input
01 : SIU2 DCD2# input
10 : General-purpose output
11 : RFU
These bits control direction and function of the GPIO4 pin as follows:
00 : General-purpose input
01 : RFU
10 : General-purpose output
11 : RFU
These bits control direction and function of the GPIO3 pin as follows:
00 : General-purpose input
01 : RFU
10 : General-purpose output
11 : Programmable chip select 0 output
User's Manual U14272EJ3V0UM
12 11
GP5MD1 GP5MD0
R/W R/W R/W
0 0
Note Note Note
4 3
GP1MD1 GP1MD0
R/W R/W R/W
0 0
Note Note Note
Function
10 9 8
GP4MD1 GP4MD0
R/W R/W
0 0 0
Note Note
2 1 0
GP0MD1 GP0MD0
R/W R/W
0 0 0
Note Note
(1/2)