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CHAPTER 8 CLOCKED SERIAL INTERFACE UNIT (CSI)
8.1 Overview
The CSI manages communication via a synchronous serial bus. The CSI of the V
characteristics:
• Slave-only synchronous serial interface
• Able to transmit and receive data simultaneously
• Supports fixed 8-bit character length
• Supports burst lengths of 1 to 65535 bits
• Continuous transfer mode for of peripherals supporting auto-scan
• Programmable clock phase and clock polarity
The CSI interface shares pins with GPIO signals as follows. When using the CSI, set these pins to use as CSI
signals in the registers of the GIU in advance.
GPIO Pin
CSI Signal
GPIO10
FRM
GPIO2
SCK
GPIO1
SO
GPIO0
SI
Caution No clock is supplied to the CSI in the initial state. When using the CSI, set the MSKCSUPCLK bit
of the CMUCLKMSK register in the MBA Host Bridge to 1 in advance so that a clock is supplied.
8.2 Operation of CSI
8.2.1 Transmit/receive operations
Transmit and receive operations are initiated by an external master to drive the serial clock, SCK. The
characteristics of the protocol are controlled by the CSIMODE register, in particular by CKPOL, CKMD, FRMEN, and
FRMMD bits. CKPOL and CKMD bits control the relationship between data driven on SO and SI, and the phase of
the serial clock input to SCK. FRMEN and FRMMD bits enable and control the FRM input.
156
Optional multifunction control input. In one mode, FRM determines data direction (transmit
or receive). In the other mode, FRM enables (low level) or inhibits (high level)
transmissions.
Serial clock input (Maximum frequency: 1.6 MHz)
Serial data output
Serial data input
User's Manual U14272EJ3V0UM
4181 has the following key
R
Definition
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