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8.3.4 CSILSTAT (0x0B00 0906)
Bit
15
Name
TFIFOT1
R/W
R/W
RTCRST
0
Other resets
0
Bit
7
Name
RFIFOT1
R/W
R/W
RTCRST
0
Other resets
0
Bit
Name
15, 14
TFIFOT(1:0)
13 to 11
Reserved
10
TXFIFOF
9
TXFIFOE
8
TXBUSY
7, 6
RFIFOT(1:0)
5
Reserved
164
CHAPTER 8 CLOCKED SERIAL INTERFACE UNIT (CSI)
14
13
TFIFOT0
Reserved
Reserved
R/W
R
0
0
0
0
6
5
RFIFOT0
Reserved
FRMDIR
R/W
R
0
0
0
0
CSI transmit FIFO threshold. These bits select the level at which the transmit
FIFO empty status is notified.
00 : 1 or more words are free in transmit FIFO
01 : 2 or more words are free in transmit FIFO
10 : 4 or more words are free in transmit FIFO
11 : Reserved
0 is returned after read
CSI transmit FIFO full status. This bit is set to 1 when the transmit FIFO contains
no free space.
0 : Transmit FIFO not full
1 : Transmit FIFO full
CSI transmit FIFO empty status. This bit is set to 1 when the transmit FIFO
reaches to the empty level defined by TFIFOT bits.
0 : Transmit FIFO not empty
1 : Transmit FIFO empty
CSI transmit shift register status
0 : Idle
1 : Character transmission in progress
CSI receive FIFO threshold. These bits select the level at which the receive FIFO
full status is notified.
00 : 1 or more words are valid in receive FIFO
01 : 2 or more words are valid in receive FIFO
10 : 4 or more words are valid in receive FIFO
11 : Reserved
0 is returned after read
User's Manual U14272EJ3V0UM
12
11
10
Reserved
TXFIFOF
R
R
R
0
0
0
0
0
0
4
3
2
Reserved
RXFIFOF
R
R
R
0
0
0
0
0
0
Function
(1/2)
9
8
TXFIFOE
TXBUSY
R
R
1
0
1
0
1
0
RXFIFOE
RXBUSY
R
R
0
0
0
0
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