Operation Of Lcd Controller - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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21.3.6 Operation of LCD controller

LOCLK
(Output)
SHCLK
(Output)
FPD3
W−4
(Output)
FPD2
W−3
(Output)
FPD1
W−2
(Output)
FPD0
W−1
(Output)
Remark W: panel width (Hact(5:0) x 8)
The polarity (order of rising and falling edges) of the LOCLK and the SHCLK are programmable via the LPPOL
and SCLKPOL bits.
408
CHAPTER 21 LCD CONTROLLER
Figure 21-5. Monochrome Panel
0
4
8
1
5
9
2
6
10
3
7
11
SHCLK x W/4 pulses
User's Manual U14272EJ3V0UM
W−4
0
W−3
1
W−2
2
W−1
3
4
5
6
7

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