Speaker Source 2 Address Registers - NEC VR4181 mPD30181 User Manual

7.2.4 Speaker source 2 address registers

(1) SPKRSRC2REG1 (0x0A00 002C)
Bit 15
Name SS2A15
R/W R/W
At reset 0
Bit 7
Name SS2A7
R/W R/W
At reset 0
Bit Name
15 to 0 SS2A(15:0)
(2) SPKRSRC2REG2 (0x0A00 002E)
Bit 15
Name SS2A31
R/W R/W
At reset 0
Bit 7
Name SS2A23
R/W R/W
At reset 0
Bit Name
15 to 0 SS2A(31:16)
These two registers specify the source memory address of the secondary DMA buffer for the Speaker channel.
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CHAPTER 7 DMA CONTROL UNIT (DCU)
14 13
SS2A14 SS2A13 SS2A12
R/W R/W
0 0
6 5
SS2A6 SS2A5
R/W R/W
0 0
Lower 16 bits (A(15:0)) of DMA source 2 address for Speaker
14 13
SS2A30 SS2A29 SS2A28
R/W R/W
0 0
6 5
SS2A22 SS2A21 SS2A20
R/W R/W
0 0
Upper 16 bits (A(31:16)) of DMA source 2 address for Speaker
User's Manual U14272EJ3V0UM
12 11
SS2A11 SS2A10
R/W R/W
0 0
4 3
SS2A4 SS2A3 SS2A2
R/W R/W
0 0
Function
12 11
SS2A27 SS2A26
R/W R/W
0 0
4 3
SS2A9 SS2A18
R/W R/W
0 0
Function
10 9
SS2A9 SS2A8
R/W R/W R/W
0 0
2 1
SS2A1 SS2A0
R/W R/W R/W
0 0
10 9
SS2A25 SS2A24
R/W R/W R/W
0 0
2 1
SS2A17 SS2A16
R/W R/W R/W
0 0
8
0
0
0
8
0
0
0