Sysint2Reg (0X0A00 0200) - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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9.2.5 SYSINT2REG (0x0A00 0200)

Bit
15
Name
Reserved
R/W
R
RTCRST
0
Other resets
0
Bit
7
Name
Reserved
R/W
R
RTCRST
0
Other resets
0
Bit
Name
15 to 7
Reserved
6
LCDINTR
5
DMAINTR
4
Reserved
3
CSUINTR
2
ECUINTR
1
LEDINTR
0
RTCL2INTR
This register indicates level-1 interrupt requests' status.
180
CHAPTER 9 INTERRUPT CONTROL UNIT (ICU)
14
13
Reserved
Reserved
Reserved
R
R
0
0
0
0
6
5
LCDINTR
DMAINTR
Reserved
R
R
0
0
0
0
0 is returned when read
LCD interrupt request
0 : Not occurred
1 : Occurred
DMA interrupt request
0 : Not occurred
1 : Occurred
0 is returned when read
CSI interrupt request
0 : Not occurred
1 : Occurred
CompactFlash interrupt request
0 : Not occurred
1 : Occurred
LED interrupt request
0 : Not occurred
1 : Occurred
RTCLong2 interrupt request
0 : Not occurred
1 : Occurred
User's Manual U14272EJ3V0UM
12
11
10
Reserved
Reserved
R
R
R
0
0
0
0
0
0
4
3
2
CSUINTR
ECUINTR
R
R
R
0
0
0
0
0
0
Function
9
8
Reserved
Reserved
R
R
0
0
0
0
1
0
LEDINTR
RTCL2INTR
R
R
0
0
0
0

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