NEC VR4181 mPD30181 User Manual page 165

64-/32-bit microprocessor hardware
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Bit
Name
4
FRMDIR
3
Reserved
2
RXFIFOF
1
RXFIFOE
0
RXBUSY
CHAPTER 8 CLOCKED SERIAL INTERFACE UNIT (CSI)
FRM input pin status
0 : Low level (transmit direction)
1 : High level (receive direction)
0 is returned after read
CSI receive FIFO full status. This bit is set to 1 when the receive FIFO reaches to
the full level defined by RFIFOT bits.
0 : Receive FIFO not full
1 : Receive FIFO full
CSI receive FIFO empty status. This bit is set to 1 when the receive FIFO
contains no valid data.
0 : Receive FIFO not empty
1 : Receive FIFO empty
CSI receive shift register status
0 : Idle
1 : Character reception in progress
User's Manual U14272EJ3V0UM
Function
(2/2)
165

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