Sysint1Reg (0X0A00 0080) - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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9.2.1 SYSINT1REG (0x0A00 0080)

Bit
15
Name
Reserved
R/W
R
RTCRST
0
Other resets
0
Bit
7
Name
KIUINTR
R/W
R
RTCRST
0
Other resets
0
Bit
Name
15, 14
Reserved
13
DOZEPIUINTR
12
Reserved
11
SOFTINTR
10
Reserved
9
SIUINTR
8
GIUINTR
7
KIUINTR
6
AIUINTR
174
CHAPTER 9 INTERRUPT CONTROL UNIT (ICU)
14
13
Reserved
DOZEPIU
Reserved
INTR
R
R
0
0
0
0
6
5
AIUINTR
PIUINTR
Reserved
R
R
0
0
0
0
0 is returned when read
PIU interrupt request during Suspend mode
0 : Not occurred
1 : Occurred
0 is returned when read
Software interrupt request
0 : Not occurred
1 : Occurred
0 is returned when read
SIU interrupt request
0 : Not occurred
1 : Occurred
GIU interrupt request
0 : Not occurred
1 : Occurred
KIU interrupt request
0 : Not occurred
1 : Occurred
AIU interrupt request
0 : Not occurred
1 : Occurred
User's Manual U14272EJ3V0UM
12
11
10
SOFTINTR
Reserved
R
R
R
0
0
0
0
0
0
4
3
2
ETIMER
RTCL1
INTR
INTR
R
R
R
0
0
0
0
0
0
Function
(1/2)
9
8
SIUINTR
GIUINTR
R
R
0
0
0
0
1
0
POWER
BATINTR
INTR
R
R
0
0
0
0

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