NEC VR4181 mPD30181 User Manual page 409

LOCLK
(Output)
SHCLK
(Output)
FPD3
W−3G
(Output)
FPD2
W−3B
(Output)
FPD1
W−2R
(Output)
FPD0
W−2G
(Output)
FPD7
W−2B
(Output)
FPD6
W−1R
(Output)
FPD5
W−1G
(Output)
FPD4
W−1B
(Output)
Remark W: panel width (Hact(5:0) x 8)
The polarity (order of rising and falling edges) of the LOCLK and the SHCLK are programmable via the LPPOL
and SCLKPOL bits.
Remark In the color 8-bit data bus mode, FPD(3:0) are for upper 4 bits of the LCD data bus, and FPD(7:4) are
for lower 4 bits of the LCD data bus.
CHAPTER 21 LCD CONTROLLER
Figure 21-6. Color Panel in 8-Bit Data Bus
0R 2B 5G
0G 3R 5B
0B 3G 6R
1R 3B 6G
1G 4R 6B
1B 4G 7R
2R 4B 7G
2G 5R 7B
SHCLK x W x 3/8 pulses
User's Manual U14272EJ3V0UM
W−3G 0R
W−3B 0G
W−2R 0B
W−2G 1R
W−2B 1G
W−1R 1B
W−1G 2R
W−1B 2G
2B
3R
3G
3B
4R
4G
4B
5R
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