NEC VR4181 mPD30181 User Manual page 22

64-/32-bit microprocessor hardware
Table of Contents

Advertisement

CHAPTER 20 SERIAL INTERFACE UNIT 2 (SIU2) ......................................................................... 379
20.1 General .................................................................................................................................... 379
20.2 Clock Control Logic ............................................................................................................... 379
20.3 Register Set ............................................................................................................................ 380
20.3.1 SIURB_2 (0x0C00 0000: LCR7 = 0, Read) ............................................................................... 381
20.3.2 SIUTH_2 (0x0C00 0000: LCR7 = 0, Write) ............................................................................... 381
20.3.3 SIUDLL_2 (0x0C00 0000: LCR7 = 1) ........................................................................................ 381
20.3.4 SIUIE_2 (0x0C00 0001: LCR7 = 0) ........................................................................................... 382
20.3.5 SIUDLM_2 (0x0C00 0001: LCR7 = 1) ....................................................................................... 383
20.3.6 SIUIID_2 (0x0C00 0002: Read) ................................................................................................. 385
20.3.7 SIUFC_2 (0x0C00 0002: Write) ................................................................................................. 387
20.3.8 SIULC_2 (0x0C00 0003) ........................................................................................................... 390
20.3.9 SIUMC_2 (0x0C00 0004) .......................................................................................................... 391
20.3.10 SIULS_2 (0x0C00 0005) ......................................................................................................... 392
20.3.11 SIUMS_2 (0x0C00 0006) ......................................................................................................... 394
20.3.12 SIUSC_2 (0x0C00 0007) ......................................................................................................... 395
20.3.13 SIUIRSEL_2 (0x0C00 0008) .................................................................................................... 395
20.3.14 SIURESET_2 (0x0C00 0009) .................................................................................................. 396
20.3.15 SIUCSEL_2 (0x0C00 000A) .................................................................................................... 396
20.3.16 SIUACTMSK_2 (0x0C00 000C) .............................................................................................. 397
20.3.17 SIUACTTMR_2 (0x0C00 000E) ............................................................................................... 398
CHAPTER 21 LCD CONTROLLER ..................................................................................................... 399
21.1 Overview ................................................................................................................................. 399
21.1.1 LCD interface ............................................................................................................................. 399
21.2 LCD Module Features ............................................................................................................ 400
21.3 LCD Controller Specification ................................................................................................ 402
21.3.1 Panel configuration and interface .............................................................................................. 402
21.3.2 Controller clocks ........................................................................................................................ 405
21.3.3 Palette ....................................................................................................................................... 406
21.3.4 Frame buffer memory and FIFO ................................................................................................ 406
21.3.5 Panel power ON/OFF sequence ................................................................................................ 407
21.3.6 Operation of LCD controller ....................................................................................................... 408
21.4 Register Set ............................................................................................................................ 413
21.4.1 HRTOTALREG (0x0A00 0400) .................................................................................................. 414
21.4.2 HRVISIBREG (0x0A00 0402) .................................................................................................... 414
21.4.3 LDCLKSTREG (0x0A00 0404) .................................................................................................. 415
21.4.4 LDCLKENDREG (0x0A00 0406) ............................................................................................... 415
21.4.5 VRTOTALREG (0x0A00 0408) .................................................................................................. 416
21.4.6 VRVISIBREG (0x0A00 040A) .................................................................................................... 416
21.4.7 FVSTARTREG (0x0A00 040C) ................................................................................................. 417
21.4.8 FVENDREG (0x0A00 040E) ...................................................................................................... 417
21.4.9 LCDCTRLREG (0x0A00 0410) .................................................................................................. 418
21.4.10 LCDINRQREG (0x0A00 0412) ................................................................................................ 419
21.4.11 LCDCFGREG0 (0x0A00 0414) ................................................................................................ 420
21.4.12 LCDCFGREG1 (0x0A00 0416) ................................................................................................ 421
22
User's Manual U14272EJ3V0UM

Advertisement

Table of Contents
loading

Table of Contents