Gpinten (0X0B00 030C) - NEC VR4181 mPD30181 User Manual

13.3.7 GPINTEN (0x0B00 030C)

Bit 15
Name GIEN15
R/W R/W
RTCRST 0
Note
Other resets
Bit 7
Name GIEN7
R/W R/W
RTCRST 0
Other resets Note
Bit Name
15 to 0 GIEN(15:0)
Note Holds the value before reset
Remark About the relationship between the GPINTEN and GPINTMSK registers, refer to Figure 13-1. GPIO(15:0)
Interrupt Request Detecting Logic.
256
CHAPTER 13 GENERAL PURPOSE I/O UNIT (GIU)
14 13
GIEN14 GIEN13 GIEN12
R/W R/W
0 0
Note Note
6 5
GIEN6 GIEN5 GIEN4
R/W R/W
0 0
Note Note
GPIO interrupt enable. There is a one-to-one correspondence between these bits
and GPIO pins. When one of the GPIO(15:0) pins is defined as a general-purpose
input, the corresponding bit in this register enables interrupts for that pin as
follows:
0 : Interrupt disabled
1 : Interrupt enabled
User's Manual U14272EJ3V0UM
12 11
GIEN11 GIEN10
R/W R/W R/W
0 0
Note Note Note
4 3
GIEN3 GIEN2
R/W R/W R/W
0 0
Note Note Note
Function
10 9 8
GIEN9 GIEN8
R/W R/W
0 0 0
Note Note
2 1 0
GIEN1 GIEN0
R/W R/W
0 0 0
Note Note