Miscregn (0X0B00 0330 To 0X0B00 034E) - NEC VR4181 mPD30181 User Manual

13.3.24 MISCREGn (0x0B00 0330 to 0x0B00 034E)

Remark n = 0 to 15
MISCREG0 (0x0B00 0330)
MISCREG1 (0x0B00 0332)
MISCREG2 (0x0B00 0334)
MISCREG3 (0x0B00 0336)
MISCREG4 (0x0B00 0338)
MISCREG5 (0x0B00 033A)
MISCREG6 (0x0B00 033C)
MISCREG7 (0x0B00 033E)
Bit 15
Name MISCnD15
R/W R/W
RTCRST 0
Other resets Note
Bit 7
Name MISCnD7
R/W R/W
RTCRST 0
Other resets Note
Bit Name
15 to 0 MISCnD(15:0)
Note Holds the value before reset
Remark n = 0 to 15
These registers are battery-backed, and its contents are retained even in Hibernate mode.
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CHAPTER 13 GENERAL PURPOSE I/O UNIT (GIU)
MISCREG8 (0x0B00 0340)
MISCREG9 (0x0B00 0342)
MISCREG10 (0x0B00 0344)
MISCREG11 (0x0B00 0346)
MISCREG12 (0x0B00 0348)
MISCREG13 (0x0B00 034A)
MISCREG14 (0x0B00 034C)
MISCREG15 (0x0B00 034E)
14 13
MISCnD14 MISCnD13 MISCnD12
R/W R/W
0 0
Note Note
6 5
MISCnD6 MISCnD5 MISCnD4
R/W R/W
0 0
Note Note
Miscellaneous data
User's Manual U14272EJ3V0UM
12 11
MISCnD11 MISCnD10
R/W R/W R/W
0 0
Note Note Note
4 3
MISCnD3 MISCnD2
R/W R/W R/W
0 0
Note Note Note
Function
10 9 8
MISCnD9 MISCnD8
R/W R/W
0 0 0
Note Note
2 1 0
MISCnD1 MISCnD0
R/W R/W
0 0 0
Note Note