Pmuwaitreg (0X0B00 00A8) - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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10.7.3 PMUWAITREG (0x0B00 00A8)

Bit
15
Name
Reserved
R/W
R
RTCRST
0
Other resets
0
Bit
7
Name
WCOUNT
7
R/W
R/W
RTCRST
0
Other resets
Note
Bit
Name
15, 14
Reserved
13 to 0
WCOUNT(13:0)
Note Holds the value before reset
This register is used to set the activation wait time when the CPU core is activated.
This register is set to 0x2C00 (i.e. 343.75 ms activation wait time) after RTC reset. Therefore, the 343.75 ms wait
time is always inserted as an activation wait time, when the CPU core is activated immediately after RTC reset. The
activation wait time can be changed by setting this register for the CPU core activation from the Hibernate mode.
When this register is set to 0x0, 0x1, 0x2, 0x3, or 0x4, the operation is not guaranteed. Software must set the
value of this register to greater than 0x4 to assure reliable operation.
CHAPTER 10 POWER MANAGEMENT UNIT (PMU)
14
13
Reserved
WCOUNT
WCOUNT
13
R
R/W
0
1
0
Note
6
5
WCOUNT
WCOUNT
WCOUNT
6
5
R/W
R/W
0
0
Note
Note
0 is returned when read
Activation wait time timer count value
Activation wait time = WCOUNT(13:0) x (1/32.768) ms
User's Manual U14272EJ3V0UM
12
11
10
WCOUNT
WCOUNT
12
11
10
R/W
R/W
R/W
0
1
Note
Note
Note
4
3
WCOUNT
WCOUNT
4
3
R/W
R/W
R/W
0
0
Note
Note
Note
Function
9
8
WCOUNT
WCOUNT
9
8
R/W
R/W
1
0
0
Note
Note
2
1
0
WCOUNT
WCOUNT
2
1
0
R/W
R/W
0
0
0
Note
Note
213

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