Micrclenreg (0X0A00 0658); Spkrclenreg (0X0A00 065A) - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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7.2.7 MICRCLENREG (0x0A00 0658)

Bit
15
Name
MICRL15
R/W
R/W
At reset
1
Bit
7
Name
MICRL7
R/W
R/W
At reset
1
Bit
Name
15 to 0
MICRL(15:0)
This register defines the number of 16-bit words to be transferred during DMA operation in the Microphone
channel.

7.2.8 SPKRCLENREG (0x0A00 065A)

Bit
15
Name
SPKRL15
R/W
R/W
At reset
1
Bit
7
Name
SPKRL7
R/W
R/W
At reset
1
Bit
Name
15 to 0
SPKRL(15:0)
This register defines the number of 16-bit words to be transferred during DMA operation in the Speaker channel.
150
CHAPTER 7 DMA CONTROL UNIT (DCU)
14
13
MICRL14
MICRL13
MICRL12
R/W
R/W
1
1
6
5
MICRL6
MICRL5
R/W
R/W
1
1
DMA Record Length for Microphone. MICRL0 bit must be written to zero.
14
13
SPKRL14
SPKRL13
SPKRL12
R/W
R/W
1
1
6
5
SPKRL6
SPKRL5
R/W
R/W
1
1
DMA Record Length for Speaker. SPKRL0 bit must be written to zero.
User's Manual U14272EJ3V0UM
12
11
MICRL11
MICRL10
R/W
R/W
1
1
4
3
MICRL4
MICRL3
MICRL2
R/W
R/W
1
1
Function
12
11
SPKRL11
SPKRL10
R/W
R/W
1
1
4
3
SPKRL4
SPKRL3
SPKRL2
R/W
R/W
1
1
Function
10
9
MICRL9
MICRL8
R/W
R/W
R/W
1
1
2
1
MICRL1
MICRL0
R/W
R/W
R/W
1
1
10
9
SPKRL9
SPKRL8
R/W
R/W
R/W
1
1
2
1
SPKRL1
SPKRL0
R/W
R/W
R/W
1
1
8
1
0
1
8
1
0
1

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