NEC VR4181 mPD30181 User Manual page 266

64-/32-bit microprocessor hardware
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Bit
Name
7
LOOPBK2
6 to 3
Reserved
2
REGCTS2
1
REGDSR2
0
REGDCD2
266
CHAPTER 13 GENERAL PURPOSE I/O UNIT (GIU)
Loopback enable for serial interface channel 2. When GPIO pins have not be
allocated for the line status signals DSR2# and/or CTS2# of the serial interface
channel 2, this bit can be set to 1 to allow the serial interface line status output
signals to be connected to the line status input signals as follows:
DTR2# output from serial interface drives the DSR2# input to serial interface
RTS2# output from serial interface drives the CTS2# input to serial interface
0 is returned when read
CTS2# data. When the LOOPBK2 bit is reset to 0 and a GPIO pin has not been
enabled to provide CTS2#, the CTS2# input to the serial interface channel 2 is
driven with the value of this bit.
DSR2# data. When the LOOPBK2 bit is reset to 0 and a GPIO pin has not been
enabled to provide DSR2#, the DSR2# input to the serial interface channel 2 is
driven with the value of this bit.
DCD2# data. When a GPIO pin has not been enabled to provide DCD2#, the
DCD2# input to the serial interface channel 2 is driven with the value of this bit.
User's Manual U14272EJ3V0UM
Function
(2/2)

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