NEC VR4181 mPD30181 User Manual page 240

The serial interface channel 2 (SIU2) utilizes the dedicated IRDIN/RxD2 and IRDOUT/TxD2 pins. The line control
signals, DTR2#, RTS2#, DCD2#, DSR2#, and CTS2#, are enabled by writing to the GPIO Mode registers and are
utilized through the following GPIO pins:
GPIO pin
GPIO9
GPIO8
GPIO6
GPIO5
GPIO7
The transmit and receive data signals, TxD2 and RxD2, are enabled by writing to the SIUIRSEL_2 register in the
SIU2.
Control of the serial interface channel 2 line status inputs is identical to that of the serial interface channel 1. The
GIU drives inputs to the serial interface channel 2 based on the settings in the GPIO Mode registers and bit 7,
LOOPBK2, of the GPSICTL register (address: 0x0B00 031A) (for additional information, see 13.3.14 GPSICTL
(0x0B00 031A)).
When GPIO pins have been assigned to provide the serial interface channel 2 inputs, DTR2#, RTS2#, and
DCD2#, the GIU simply passes the signals driven on the GPIO pins to the corresponding serial interface channel 2
inputs. Otherwise, the GIU drives these signals based on the value programmed in the GPSICTL register as follows:
Table 13-7. Serial Interface Channel 2 (SIU2) Loopback Control
LOOPBK2 bit value
0
1
Note that the GIU does not drive the RxD2 input. This signal is always available to the serial interface as either
IRDIN or RxD2.
240
CHAPTER 13 GENERAL PURPOSE I/O UNIT (GIU)
Table 13-6. Serial Interface Channel 2 (SIU2) Signals
SIU2 signal
CTS2#
DSR2#
RTS2#
DCD2#
DTR2#
DSR2#: REGDSR2 (bit 1) value
CTS2#: REGCTS2 (bit 2) value
DCD2#: REGDCD2 (bit 0) value
DSR2#: DTR2# output
CTS2#: RTS2# output
DCD2#: REGDCD2 (bit 0) value
User's Manual U14272EJ3V0UM
Input
Input
Output
Input
Output
Source for driving SIU2 input
Type