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5.1.5 HALTimer shutdown
After an RTC reset or RSTSW reset is canceled, if the HALTimer is not canceled (the HALTIMERRST bit of the
PMUCNTREG register is not set) by software within about four seconds, the V
from reset status occurs when the POWER pin is asserted or when a ElapsedTime interrupt request occurs.
A reset by HALTimer initializes the entire internal state except for the RTC timer, the GIU, and the PMU.
After a reset, the processor becomes the system bus master, which executes a Cold Reset exception sequence
and begins to access the reset vectors in the ROM space. Since only part of the internal status is reset when a reset
occurs in the V
4181, the processor should be completely initialized by software (see 5.4 Notes on Initialization).
R
Caution The V
4181 does not sets the DRAM to self-refresh mode by HALTimer shutdown. Therefore, the
R
contents of DRAM after a HALTimer shutdown are not at all guaranteed.
POWER (Input)
POWERON (Output)
MPOW ER (Output)
ColdReset# (Internal)
Reset# (Internal)
PLL (Internal)
RTC (Internal,
32.768 kHz)
Notes 1. Wait time for activation. It can be changed by setting the PMUWAITREG register.
2. MasterClock is the basic clock used in the CPU core.
frequency.
CHAPTER 5 INITIALIZATION INTERFACE
Figure 5-5. HALTimer Shutdown
Stable oscillation
about 4 s
> 32 ms
User's Manual U14272EJ3V0UM
4181 enters reset status. Recovery
R
Stopped
Undefined
Note1
Its frequency is one forth of TClock
Stable oscillation
16 ms
Note2
16MasterClock
101
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