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13.2.4 Programmable chip selects
The GIU provides two programmable chip select signals, PCS(1:0)#. These chip select signals are available on
the following GPIO pins:
GPIO pin
GPIO11
GPIO3
Each programmable chip select signal can be defined individually as memory- or I/O-mapped, 8- or 16-bit data
width, and 1 to 64K bytes of address ranges. The chip selects can also be qualified with I/O or memory read strobes.
13.2.5 16-bit bus cycles
The GIU generates two internal outputs (gpiocs16_l and gpmemcs16_l) to the internal ISA bus to signal the data
width of the target of an external ISA cycle. The internal ISA bus uses these outputs as the IOCS16# and
MEMCS16# signals that are AND'ed with the outputs from other internal ISA units.
The gpiocs16_l output is controlled by either a programmable chip select set in the PCSMODE register (0x0B00
032C) or IOCS16#/GPIO19 pin. When one of the programmable chip selects has been defined as I/O mapped and
16-bit data width, the gpiocs16_l output is asserted while the I/O cycle address is within the range specified for the
programmable chip select. When the IOCS16#/GPIO19 pin has been configured as IOCS16#, the gpiocs16_l output
follows the state of the IOCS16# signal.
The gpmemcs16_l output is controlled by a programmable chip select or the LOCLK/MEMCS16# pin. When one of
the programmable chip selects has been defined as memory mapped and 16-bit data width, the gpmemcs16_l output
is asserted while the memory cycle address is within the range specified for the programmable chip select. When the
LOCLK/MEMCS16# pin has been configured as MEMCS16#, the gpmemcs16_l output follows the state of the
MEMCS16# signal.
13.2.6 General purpose input/output
Each one of the 32 GPIO pins can be defined as a general-purpose input or a general-purpose output. When a pin
is configured as a general-purpose output, a corresponding value written to the GPDATLREG register or the
GPDATHREG register appears on the GPIO pin. When a pin is configured as a general-purpose input, a value driven
on the GPIO pin can be read from its corresponding data bit of the GPDATLREG or GPDATHREG register.
242
CHAPTER 13 GENERAL PURPOSE I/O UNIT (GIU)
Table 13-10. Programmable Chip Select Signals
Programmable chip select
PCS1#
PCS0#
User's Manual U14272EJ3V0UM
Type
Output
Output
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